Feb 11
2015
2015
The impact of caching on MIPS
I wrote my bare-metal CI20 demo tutorial to run in the uncached area of the MIPS address space. This means that all memory accesses bypass the cache completely and go straight to and from main memory. Unsurprisingly, this is quite slow.
It’s pretty easy to change the demo to use cached memory:
- Fix the entry point: modify linker.lds, changing “. = 0xa8000000” to “. = 0x88000000". This moves the code from kseg1 (uncached) to kseg0 (cached);
- Fix the stack: modify start.S, changing “li sp, 0xa9000000” to “li sp, 0x89000000”. This does the same thing to the stack;
- Make it more obvious: modify the delay function in main.c, making the loop from 0 to 1000000 (previously it ended at 1000); and
- Rebuild: make clean && make, then copy the new hello.bin to your tftp directory.
If you do that, then you will see the very dramatic effect that caching has on code performance on the MIPS! I made a short video (37 seconds) demonstrating the difference: https://www.youtube.com/watch?v=Ve0xtVGApbA